FishTail Design Automation offers a unique approach to improving the chip design process by automatically generating and verifying golden timing constraints early in the design cycle. FishTail also offers a solution for the management of design constraints as chip-implementation progresses. FishTail's products allow designers to drive chip-implementation with complete constraints that are formally proven to be correct and to then manage the constraints as chip-implementation progresses. The result is improved chip timing, area and power, and a shorter chip-implementation schedule with much fewer back-end timing closure iterations. Also, by formally proving the correctness of design constraints using FishTail products, design projects eliminate the risk of silicon failure resulting from incorrect timing exceptions.

The breakthrough, patented technology used in FishTail's products is based on the ability to take a large, complex RTL or gate-level design and automatically abstract the behavior and structure of the design, so as to only keep the information that is required for the task being performed. The abstraction capability allows FishTail products to generate and verify timing exceptions on multi-million gate designs in an overnight run.

FishTail Design Automation is a privately funded, early-stage corporation based in Portland, Oregon. FishTail was founded in 2002, shipped its first product in 2004 and customers first taped out using the tool in 2005.

FishTail's Founder and CEO, Ajay Daga has 23 years of EDA experience. Prior to founding FishTail, Ajay was Senior R&D Manager for hierarchical static timing analysis in the PrimeTime team at Synopsys, where he led the development of innovative timing abstraction technology. Prior to Synopsys, Ajay was Product Line Manager at Mentor Graphics. Ajay received a PhD in Computer Engineering from The University of Michigan.